1. Field of the Invention
The present invention relates to a solid-state imaging device and a production method thereof.
2. Description of the Related Art
As a solid-state imaging device, a structure in which each element, each film, and so on are formed on the front surface side of a semiconductor substrate and an image is picked up by making light enter from the front surface side has conventionally been employed.
However, in the case of such structure, incident light is absorbed or reflected by each element, each film, and so on formed on the front surface side, so that photoelectric conversion efficiency of incident light is low, hence the structure has low sensitivity.
Therefore, as a structure which solves this kind of problem, what is called a back-illuminated type solid-state imaging device has recently been used, in which each element, each film, and so on are formed on the front surface side of a semiconductor substrate, whereas light is made enter from the back surface side of the semiconductor substrate to pick up an image, so that the aperture ratio to receive light increases and the absorption or reflection of incident light is reduced (refer to Patent Literature 1, for example).
A solid-state imaging device having the above-described structure, for example, having the structure of a CMOS-type solid-state imaging device is explained referring to FIGS. 1A and 1B.
FIG. 1A shows a schematic plan view of an imaging area seen from the back surface side, and FIG. 1B shows a schematic sectional view of an A-A line in FIG. 1A.
A CMOS-type solid-state imaging device 50 includes photoelectric conversion elements (what is called photodiode (PD) portions) 54 each made of a concentrated N-type semiconductor area are formed in unit pixel areas 53 which are separated by an element-isolation area 52 formed in a semiconductor substrate 51 (single-crystal silicon layer, for example).
Further, circuits (readout circuits) 55 which read out signal charge stored in each of the photoelectric conversion elements 54 are respectively formed on one surface of the single-crystal silicon layer 51, namely on the front surface side (upper side in the figure) of the single-crystal silicon layer 51, and a wiring layer 56 is formed above those readout circuits 55.
Further, on-chip lenses 57 are formed on the other surface of the single-crystal silicon layer 51, that is, on the back surface side (lower side in the figure) of the single-crystal silicon layer 51 at positions corresponding to the photoelectric conversion elements 54 with a planarizing film (passivation film) 59 in between.
Each readout circuit 55 specifically includes: a readout gate portion 63 made of a P-type semiconductor area; a floating diffusion portion (FD portion) 64 adjacent to the readout gate portion 63, which is made of a concentrated N-type semiconductor area and converts a signal charge stored in a photoelectric conversion element 54 into a voltage; and a readout electrode 66 formed on the readout gate portion 63.
In addition, a reference numeral 67 denotes a second element-isolation area made of a P-type semiconductor area. Further, a reference numeral 68 denotes an electric charge storage area made of a concentrated P-type semiconductor area, which is formed on the front surface side of the photoelectric conversion element 54.
Furthermore, although not shown in the figures, each of those unit pixel areas 53 includes a reset gate portion which sweeps out a signal charge stored in the floating diffusion portion 64, an output portion (output amplifier) which outputs a voltage converted at the floating diffusion portion 64 and the like.
The wiring layer 56 has wiring of two layers, for example.
Specifically, in an insulating layer 74 formed on the single-crystal silicon layer 51, the wiring layer 56 includes first-layer wiring 561 and second-layer wiring 562 which is formed on the first-layer wiring 561 with the insulating layer 74 in between.
In addition, on the insulating layer 74 is formed a planarizing film made of a passivation film, and on the planarizing film is stuck a supporting substrate 58 through an adhesive layer (not shown in the figure).
Then, in the CMOS-type solid-state imaging device 50 thus constructed, image light (arrow marks X in the figure) is made to enter from the back surface side of the single-crystal silicon layer 51.
[Patent Literature 1] Published Japanese Patent Application No. 2003-31785 (refer to paragraph nos. [0027] to [0029] and FIG. 3)